This document gives a brief overview of SPICE. The description is far from complete, as SPICE is a powerful circuit simulator with many capabilities. However, this document will serve as a start for students in introductory classes. For more information, please refer to the SPICE user's manual or books listed at the end of the document.
The translated versions:
- Slovak Language can be found here.
- Ukrainian translation https://edu-helper.org/p47/
A. PSPICE with Capture - ORCAD):
- PSpice Quick Reference Guide
- PSpice Tutorial
B. SPICE (without Schematic Capture)
- INTRODUCTION
- HOW TO SPECIFY CIRCUIT TOPOLOGY AND ANALYSIS?
-
2.1 Data Statements
- Independent DC Sources
- Dependent Sources
- Resistors
- Capacitors and Inductors
- Mutual Inductors
- Ideal Transformers
- Sinusoidal Sources
- Piecewise Linear Source (PWL)
- Pulse
- Voltage and Current Controlled Switches
- Operational Amplifiers (incl. model for 741)
- Subcircuits
- Semiconductor Devices
- SPICE - Getting started
5. EXAMPLES
6. MODELS of Selected Devices and Components
1. INTRODUCTION
SPICE is a powerful general purpose analog circuit simulator that is used to verify circuit designs and to predict the circuit behavior. This is of particular importance for integrated circuits. It was for this reason that SPICE was originally developed at the Electronics Research Laboratory of the University of California, Berkeley (1975), as its name implies:- Simulation Program for Integrated
Circuits Emphasis.
SPICE can do several types of circuit analyses. Here are the
most important ones:
- Non-linear DC analysis: calculates the DC transfer curve.
- Non-linear transient analysis: calculates the voltage and current as a function of time when a large signal is applied.
- Linear AC Analysis: calculates the output as a function of frequency. A bode plot is generated.
- Noise analysis
- Sensitivity analysis
- Distortion analysis
- Fourier analysis: calculates and plots the frequency spectrum.
- Monte Carlo Analysis
All analyses can be done at different temperatures. The default temperature is 300K.
The circuit can contain the following components:
- Independent and dependent voltage and current sources
- Resistors
- Capacitors
- Inductors
- Mutual inductors
- Transmission lines
- Operational amplifiers
- Switches
- Diodes
- Bipolar transistors
- MOS transistors
- JFET
- MESFET
- Digital gates (PSpice, version 5.4 and up)
2. HOW TO SPECIFY THE CIRCUIT TOPOLOGY AND ANALYSIS?
A SPICE input file, called source file, consists of three parts.- Data statements: description of the components and the interconnections.
- Control statements: tells SPICE what type of analysis to perform on the circuit.
- Output statements: specifies what outputs are to be printed or plotted.
- TITLE STATEMENT
- ELEMENT STATEMENTS
- .
- .
- COMMAND (CONTROL) STATEMENTS
- OUTPUT STATEMENTS
- .END <CR>
- RES1 1 0 3500 or RES1 1 0 3.5E3
T(= 1E12 or 10+12); G(= E9); MEG(= E6); K(= E3); M(= E-3);
U(= E-6); N(= E-9); P(= E-12), and F(= E-15)
Both upper and lower case letters are allowed in PSpice and Hspice (SPICE
uses only uppercase characters). As an example, one can specify a capacitor
of 225 picofarad in the following ways:
- 225P, 225p, 225pF; 225pFarad; 225E-12; 0.225N, etc.
2.1 Data Statements to Specify the Circuit Components and Topology
a. Independent DC Sources
Voltage source: Vname N1 N2 Type Value Current source: Iname N1 N2 Type Value
- N1 is the positive terminal node
- N2 is the negative terminal node
- Type can be DC, AC or TRAN, depending on the type of analysis (see Control Statements)
- Value gives the value of the source
- The name of a voltage and current source must start with V and I, respectively.
- Vin 2 0 DC 10
Is 3 4 DC 1.5
- Spice always assigns a positive reference mark to the 1st node and uses the passive sign convention to assign the current reference.
- Spice uses the node-voltage analysis. It solves for the unknown node voltages and also the unknown currents through independent voltage sources. This gives us a way to find currents flowing in elements: one has to ask for the current through a voltage source. Thus one can insert an independent voltage source of zero value in series with the element in which one wants to know the current, as shown in the example below:
The value of the current will be positive if it flows from the positive to the negative terminal through the source, as in the above example. Some versions of PSpice allow you to ask for a current through a resistor without using a voltage source (EX: I(R1) gives the current in the resistor R1).
b. Dependent Sources
Voltage controlled voltage source:- Ename N1 N2 NC1 NC2 Value
- Gname N1 N2 NC1 NC2 Value
- Hname N1 N2 Vcontrol Value
- Fname N1 N2 Vcontrol Value
- N1 and N2 are the positive and negative terminals of the dependent source, respectively.
- NC1 and NC2 are the positive and negative terminals of the controlling voltage source, respectively.
- Vcontrol is the zero value voltage source used to measure the controlling current (the positive current flows into the positive terminal of the controlling voltage source!).
- Examples:
- F1 0 3 Vmeas 0.5
Vmeas 4 0 DC 0
c. Resistors
- Rname N1 N2 Value
d.Capacitors (C) and Inductors (L)
- Cname N1 N2 Value <IC>
Lname N1 N2 Value <IC>
- N1 is the positive node.
- N2 is the negative node.
- IC is the initial condition (DC voltage or current).
- The symbol < > means that the field is optional. If not specified, it is assumed to be zero. In case of an inductor, the current flows from N1 to N2.
- Example:
- Cap5 3 4 35E-12 5
L12 7 3 6.25E-3 1m
e. Mutual Inductors
A mutual inductance in SPICE is defined by specifying the coupling coefficient K between the two inductors. The syntax is as follows:- Kname Inductor1 Inductor2 value_of_K
The SPICE statements to define the above coupled coils are as follows.
L1 3 5 10M- L2 4 7 3M
- K L1 L2 0.81
f. Ideal Transformer
SPICE has no model for an ideal transformer. An ideal tranformer is simulated using mutual inductances such that the transformer ratio N1/N2 = sqrt(L1/L2). Make the coupling factor K close to one (ex. K=0.99999) and choose L such that wL >> the resistance seen be the inductor. The secondary circuit needs a DC connection to ground. This can be accomplished by adding a large resistor to ground or giving the primary and secondary circuits a common node. For an example circuit see under the section Examples
g. Sinusoidal sources
- Vname N1 N2 SIN(VO VA FREQ TD THETA PHASE)
- VO - offset voltage in volt.
- VA - amplitude in volt.
- f = FREQ - the frequency in herz.
- TD - delay in seconds
- THETA - damping factor per second
- Phase - phase in degrees
which is a damped sinusoidal voltage source:
Vname = VO + VA exp[-THETA.(t - TD)] sin[2pi.f (t - TD) + (Phase/360)]
- Example: VG 1 2 SIN(5 10 50 0.2 0.1)
VG2 3 4 SIN(0 10 50)
To generate a cosine function, you can make use of the phase relationship
between the sinusoid and cosine. Here is an example of an undelayed cosine
with an amplitude of 5V and frequency of 50 Hz.
-
Vcos 1 2 SIN(0 5 50 0 0 90)
h. Piecewise linear source (PWL)
- Vname N1 N2 PWL(T1 V1 T2 V2 T3 V3 ...)
Example:
- Vgpwl 1 2 PWL(0 0 10U 5 100U 5 110U 0)
i. Pulse
- Vname N1 N2 PULSE(V1 V2 TD Tr Tf PW Period)
j. Voltage- and Current-controlled Switches
Voltage Controlled:- Sname N1 N2 C1 C2 Mname
- Wname N1 N2 Vname Mname
- N1 and N2 are the terminals of the switch.
- C1 and C2 are the controlling terminals.
- Vname is the zero-value voltage source whose current controls the switch.
- Mname refers to the switch model that is defined in another statement (see Model Statement below).
- .MODEL Mname Dname(Pvalues)
- Mname refers to the Mname in the data statement of the switch.
- Dname is the device name: Vswitch or Iswitch.
- Pvalues are the values of the switch parameters, such as RON (on - resistance), ROFF (off-resistance), VON (the control voltage for ON; default = 1V), VOFF (control voltage for OFF; default = 0V), etc.
- S15 3 5 8 9 SMOD
.MODEL SMOD VSWITCH(RON = 10, VON = 0, ROFF = 100MEG)
k. Operational Amplifiers, and other elements
An operational amplifier can be simulated in different ways. The first method is to model the amplifier by resistors, capacitors and dependent sources. As an example an ideal opamp is easily simulated using a voltage dependent voltage source. The second option uses actual transistors to model the opamp. The device library contains nonlinear models of the most common op amps. The student version of PSpice has macromodels for the linear amplifiers LM324 and uA741 which are included in the EVAL.LIB file. The professional version comes with library files of many commercial amplifiers and devices.An example of the first approach (linear AC model) is given below for the uA741 opamp. We defined a subcircuit for the opamp.
- SPICE code for the 741 opamp (ref: Macromodeling with Spice,
by J.A. Connelly/P. Choi)
- * Subcircuit for 741 opamp
- .subckt opamp741 1 2 3
- * +in (=1) -in (=2) out (=3)
- rin 1 2 2meg
- rout 6 3 75
- e 4 0 1 2 100k
- rbw 4 5 0.5meg
- cbw 5 0 31.85nf
- eout 6 0 5 0 1
- .ends opamp741
l. Subcircuits
A subcircuit allows you to define a collection of elements as a subcircuit (e.g. an operational amplifier) and to insert this description into the overall circui (as you would do for any other element).Defining a subcircuit
A subcircuit is defined bu a .SUBCKT control statement, followed
by the circuit description as follows:
- .SUBCKT SUBNAME N1 N2 N3 ...
- Element statements
- .
- .
- .
- .ENDS SUBNAME
Using a subcircuit
The element statement for a subcircuit is similar to any other element. The format is as follows:
- Xname N1 N2 N3 ... SUBNAME
An example of an inverting opamp circuit using the subcircuit
of the the uA741 (see operational
amplifiers above) is given below. The subcircuit is called x1.
- vs 1 0 dc 5
- r1 1 2 200
- rf 2 3 1k
- x1 0 2 3 opamp741
- .dc vs 0 10 1
- .plot dc v(3)
- .end
m. Semiconductor Devices
Most of the elements that have been described above require only a few parameters to specify its electrical characteristics. However, the models for semiconductor devices require many parameter values. A set of device model parameters is defined in a separate .MODEL statement and assigned a unique name. This method alliaviates the need to specify all of the model parameters on each device element card. Thus a semiconductor device is specified by two command lines: an element and model statement.The syntax for the model statement is:
- .MODEL MODName Type (parameter values)
- D: Diode
- NPN: npn bipolar transistor
- PNP: pnp bipolar transistor
- NMOS: nmos transistor
- PMOS: pmos transistor
- NJF: N-channel JFET model
- PJF: P-channel JFET model
m1. Diode
Element line: Dname N+ N- MODNameModel statement:
- .MODEL MODName D (IS= N= Rs= CJO= Tt= BV= IBV=)
As an example, the model parameters for a 1N4148 commercial diode
are as follows:
- .model D1N4148 D (IS=0.1PA, RS=16 CJO=2PF TT=12N BV=100 IBV=0.1PA)
m2. Bipolar transistors
Element: Qname C B E BJT_modelNameModel statement:
- .MODEL BJT_modName NPN (BF=val IS=val VAF=val)
- .model Q2N2222A NPN (IS=14.34F XTI=3 EG=1.11 VAF= 74.03 BF=255.9
NE=1.307 ISE=14.34F IKF=.2847 XTB=1.5 BR=6.092 NC=2 ISC=0 IKR=0 RC=1 CJC=7.306P
MJC=.3416 VJC=.75 FC=.5 CJE=22.01P MJE=.377 VJE=.75 TR=46.91N TF=411.1P
ITF=.6 VTF=1.7 XTF=3 RB=10)
m3. MOSFETS
Element: Mname ND NG NS <NB> ModName L= W=The MOS transistor name (Mname) has to start with a M; ND, NG, NS and NB are the node numbers of the Drain, Gate, Source and Bulk terminals, respectively. ModName is the name of the transistor model (see further). L and W is the length and width of the gate (in m).
The above paramters are usually sufficient when specifying discrete
transistors. However, for integrated circuit simulations one need to specify
several other parameter values related to the transistor geomtry. These
are optional.
- Mname ND NG NS NB ModName <L=VAL> <W=VAL> <AD=VAL>
<AS=VAL> <PD=VAL> <PS=VAL> <NRD=VAL> <OFF>
<IC=VDS.VGS.VBS>
- AD and AS are the area of source and drain diffusion (in sq. m).
PD and PS are the value (in m) of the perimeter of the source and drain.
NRD is the number of squares of the drain diffusion for resistance calculations.
OFF sets the starting condition to OFF.
The initial condition specification using IC=VDS, VGS, VBS is intended for use with the UIC option on the .TRAN card, when a transient analysis is desired starting from other than the quiescent operating point. See the .IC card for a better and more convenient way to specify transient initial conditions.
- .MODEL ModName NMOS (KP= VT0= lambda= gamma=)
- .MODEL ModName NMOS (<LEVEL=val> <keyname=val> ...
)
.MODEL ModName PMOS (<LEVEL=val> <keyname=val> ... )
For partial listing of the MOSFET MODEL parameters click here. Refer to the references for a complete list of parameters.
An example of the model parameters of the 1.2um CMOS MOSIS transistors can be found in section on Models of Selected Devices and Components later on.
m4. JFETS
Element: Jname ND NG NS ModNameND, NG, and NS are the node numbers of the Drain, Gate, and Source terminals,
respectively. ModName is the name of the transistor model
Model statement:
- .MODEL ModName NJF (parameter= )
.MODEL ModName PJF (parameter= )
For an example of the model parameters of the 2N5459 N-JFET see section on Models of Selected Devices and Components later on.
2.2 Commands or Control Statements to Specify the Type of Analysis
a. .OP Statement
This statement instructs Spice to compute the DC operating points:- voltage at the nodes
- current in each voltage source
- operating point for each element
b. .DC Statement
This statement allows you to increment (sweep) an independent source over a certain range with a specified step. The format is as follows:- .DC SRCname START STOP STEP
- Example: .DC V1 0 20 2
You can nest the DC sweep command which is often used to plot transistor
characteristics, such as the Drain current ids versus the Drain-source
voltage Vds for different gate voltages Vgs. This can be done as follows:
- .DC SRCname1 START STOP STEP SRCname2 START STOP STEP
Example: .DC Vds 0 5 0.5 Vgs 0 5 1
c. .TF Statement
The .TF statement instructs PSpice to calculate the following small signal characteristics:- the ratio of output variable to input variable (gain or tranfer gain)
- the resistance with respect to the input source
- the resistance with respect to the output terminals
- .TF OUTVAR INSRC
- Example: .TF V(3,0) VIN
d. .SENS Statement
This instructs PSpice to calculate the DC small-signal sensitivities of each specified output variable with respect to every circuit parameter.- .SENS VARIABLE
Example: .SENS V(3,0)
e. .TRAN Statement
This statement specifies the time interval over which the transient analysis takes place, and the time increments. The format is as follows:- .TRAN TSTEP TSTOP <TSTART <TMAX>> <UIC>
- TSTEP is the printing increment.
- TSTOP is the final time
- TSTART is the starting time (if omitted, TSTART is assumed to be zero)
- TMAX is the maximum step size.
- UIC stands for Use Initial Condition and instructs PSpice not to do the quiescent operating point before beginning the transient analysis. If UIC is specified, PSpice will use the initial conditions specified in the element statements (see data statement) IC = value.
f. .IC Statement
This statement provides an alternative way to specify initial conditions of nodes (and thus over capacitors).- .IC Vnode1 = value Vnode2 = value etc.
g. .AC Statement
This statement is used to specify the frequency (AC) analysis. The format is as follows:- .AC LIN NP FSTART FSTOP
- .AC DEC ND FSTART FSTOP
- .AC OCT NO FSTART FSTOP
- Example: .AC DEC 10 1000 1E6
h. For .NOISE, .DISTO, and .FOUR statements
Please consult the manual.2.3 Output Statements
These statements will instruct PSpice what output to generate. If you do not specify an output statement, PSpice will always calculate the DC operating points. The two types of outputs are the prints and plots. A print is a table of data points and a plot is a graphical representation. The format is as follows:- .PRINT TYPE OV1 OV2 OV3 ...
.PLOT TYPE OV1 OV2 OV3 ...
- DC
- TRAN
- AC
- M: Magnitude
- DB: Magnitude in dB (deciBells)
- P: Phase
- R: Real part
- I: Imaginary part
- .PLOT DC V(1,2) V(3) I(Vmeas)
.PRINT TRAN V(3,1) I(Vmeas)
.PLOT AC VM(3,0) VDB(4,2) VM(2,1) VP(3,1) IR(V2)
Back to Table of Contents
Jan Van der Spiegel jan_at_seas.upenn.edu
Created Sept. 30, 1995; Updated July 14, 2010