http://www.seas.upenn.edu/~ese535/spring2011/spring2011.html for updates.
| Date | Topic | Slides | Reading | Due | Assign |
|---|---|---|---|---|---|
| 1/12 | Introduction, Motivation, Overview | ppt, pdf | none | ||
| 1/17 | MLK Holiday (no class) | ||||
| 1/19 | Covering | ppt, pdf | Devadas p190--198 | ||
| 1/24 | Scheduled Operator Sharing | ppt, pdf | HL Synth D&T 1994 | Assign 1 | |
| 1/26 | Scheduling I (formulation, List Scheduling) | ppt, pdf | Scheduling Intro D&T 1995 | ||
| 1/31 | Scheduling II (force-directed, Branch-and-Bound) | ppt, pdf | DPGA
FPD1996 Tabula MPR2010 |
Assign 1 | Assign 2 |
| 2/2 | Partitioning I (formulation and KLFM) | ppt, pdf | KLFM DAC 1982 | ||
| 2/7 | Clustering | ppt, pdf | flowmap trcad1994 | Assign 2a | |
| 2/9 | Partitioning II (spectral, maxflow, replication) | ppt, pdf | Hall Mngmt Sci 1970 | ||
| 2/14 | Placement I (formulation and constructive) | ppt, pdf | Part Place ISPD 1997 | Assign 2b | Assign 3 |
| 2/16 | Placement II (simulated annealing) | ppt, pdf | SA Science 1983 | ||
| 2/18 | Drop Day | ||||
| 2/21 | Routing I (variants, formulation, channel routing, over-the-cell) | ppt, pdf | Left Edge DAC 1971 | Assign 3 | Assign 4 |
| 2/23 | Routing II (Pathfinder congestion negotiation, FPGA routing) | ppt, pdf | Pathfinder FPGA 1995 | ||
| 2/28 | FPGA (no class) | ||||
| 3/2 | Dataflow Compute Models | ppt, pdf | SDF Proc. IEEE 1987 | Assign 4 | |
| 3/7 | Spring Break (no class) | ||||
| 3/9 | Spring Break (no class) | ||||
| 3/14 | High-level Synthesis (C-to-dataflow graph) | ppt, pdf | Hauck+DeHon, Ch. 7 | Assign 5 | |
| 3/16 | Architecture Synthesis | ppt, pdf | PICO Computer2002 | ||
| 3/21 | Satisfiability (SAT) solvers | ppt, pdf | Chaff DAC2001 | Assign 5a | 3/23 | Two-level Logic | ppt, pdf | Devadas p59--91 |
| 3/28 | FSM Encoding (Sequential logic) | ppt, pdf | Exact Encode trcad1991 | Assign 5b | Assign 6--7 |
| 3/30 | FSM Equivalence Checking | ppt, pdf | seq. verify TRCAD 1988 | ||
| 4/4 | Static Timing Analysis | ppt, pdf | Devadas p225--256 | Assign 6 | |
| 4/6 | Multi-level Logic | ppt, pdf | Devadas p151--184 | ||
| 4/11 | Statistical Static Timing Analysis | ppt, pdf | SSTA DAC 2002 | Assign 7m1 | |
| 4/13 | Retiming | ppt, pdf | Retime Caltech VLSI 1983 | ||
| 4/18 | Simultaneous Retiming and Covering | ppt, pdf | Cover+Retime DAC 1996 | Assign 7m2 | |
| 4/20 | Multi-objective covering (e.g. area and delay) (also simultaneous covering and placement) |
ppt, pdf | Area+Delay DAC 1992 | ||
| 4/25 | Processor Verification | ppt, pdf | Processor Verify CAV 1994 | Assign 7 | Assign 8 |
| 5/09 | During Finals (no class) | Assign 8 | |||