• This picture is a photograph of the layout of the Eniac-on-a-Chip. The individual units are indicated on the chip. Clicking on the picture will show a more detail layout of the corresponding unit.

laoutout master programmer | layout of the function table | laout of the 2nd function table | laout of the constant transmitter | layout of the cycling unit of the eniac | layout of the multiplier | layout of the divider/square rooter | layout of one accumulator of the eniac | Image Map

Size: 7.44mm x 5.29mm; 174,569 transistors; 0.5 um CMOS technology (triple metal layer).

• Picture of the packaged Eniac-on-a-Chip compared to a dime.
• High resolution Picture of the layout of the Eniac-on-a chip (148MB)/
• Back to the Eniac Project description page

Created by Jan Van der Spiegel, August 27, 1997; Updated Dec, 27, 2012