Pioneering High-Performance Computing Architectures
As an accelerated Master's student in Electrical Engineering at the University of Pennsylvania and an undergraduate pursuing Physics and Computer Engineering, my passion lies in pushing the boundaries of computing performance through innovative hardware solutions. My research and projects are centered around FPGA-based hardware acceleration and high-performance computing architectures, with a focus on applications in data analytics and beyond Moore's Law scaling limitations.
With 2+ years of hands-on experience, I specialize in FPGA design, digital simulation, and timing analysis, complemented by strong skills in C/C++, Python, and hardware description languages (SystemVerilog, Verilog, HLS). My work in the Implementation of Computation Lab has focused on enhancing FPGA resilience and performance through techniques like real-time reconfiguration and high-resolution timing measurement.
Beyond research, I bring an entrepreneurial drive to translate technological advancements into real-world impact, as demonstrated through my early-stage startup, Cortex Forge, exploring FPGA-based AI acceleration. I am eager to contribute to cutting-edge research and collaborate with leading experts to solve complex challenges in computing.
M.S.E in Electrical Engineering, Accelerated Masters (Expected May 2026)
Relevant Coursework: System on a Chip Architecture, Computer Organization & Design, Datacenter Architecture, Machine Learning
B.S.E. in Computer Engineering & B.A. in Physics (Expected May 2026)
Engineered dynamic repair systems leveraging intra-CLB reconfiguration to automatically mitigate degradation and boost IC performance in real time. Demonstrated 10% improvement in critical path timing through on-the-fly FPGA repair mechanisms.
Developed an FPGA-based accelerator for deduplication and compression using LZW and SHA3 algorithms, optimizing real-time data throughput to meet Ethernet speed requirements. Implemented in HLS and OpenCL.
Designed an advanced audio device integrating FPGA and Atmega microcontroller technology to achieve immersive, high-fidelity sound processing. Employed Verilog for FPGA audio processing and C for microcontroller control.
Email: nmavusocorner@gmail.com
GitHub: GitHub Profile
LinkedIn: LinkedIn Profile